IBM's Jesse Stein on the G5's Roots
"Like its predecessor, each POWER5 chip has two processor cores. POWER5 uses a technology called multithreading where multiple threads (operations, applications -- even operating systems) can run independently on a single core. The result is that even the single core looks like multiple processors to the operating systems and applications," IBM PowerPC marketing programs manager Jesse Stein told MacNewsWorld.
The PowerPC chip has been the primary component of Apple's Mac systems for about a decade now. Its latest iteration, IBM's PowerPC 970 -- better known to Mac users as the G5 -- was among the first 64-bit processors available in a desktop configuration, and the impact it has had on some of the Mac's core communities of life sciences, film and design has been phenomenal.
Jesse Stein, PowerPC marketing programs manager at IBM, has spent the last three years evangelizing the PowerPC in a host of different markets. Stein spent the first 15 years of his career at Apple, first as a systems engineer, before he transitioned over to Power Mac marketing.
Recently, MacNewsWorld asked Stein several questions about PowerPC's roots and its present capabilities. Here is what he had to say:
MacNewsWorld: Provide some background on how IBM first became involved with the PowerPC chip. Was it something IBM was already developing when Apple expressed interest in it?
Jesse Stein: In 1990, IBM announced an RS/6000 Server based on RISC (Reduced Instruction Set Computing) technology invented by IBM's John Cocke in the 1970s. The processor architecture in the RS/6000 was given the name POWER for Performance Optimization With Enhanced RISC. In 1991, an effort to bring that server class processor architecture to the mainstream was announced.
A natural market to take an architecture with server-class performance to was the desktop space. POWER for the PC, or PowerPC, was born. About the same time Apple was looking for a follow-on architecture for its 68000-based computers. They expressed interest in IBM's PowerPC Architecture. When the first PowerPC chip (the PowerPC 601) was announced, it was jointly announced by IBM, Apple and Motorola -- what has been called the AIM alliance -- but IBM did the principal development on that processor before those agreements were in place.
MNW: How long did it take to develop the G5 chip? To what degree did it follow naturally from the G3 and G4, and to what degree is it a totally new configuration?
Stein: The PowerPC 970 design took several years to develop and has its basis IBM's 64-Bit POWER4 Server architecture. I think it can best be described as a "totally new configuration," because it is based on POWER4, has a 64-bit architecture and includes much faster processor buses. It does include a single instruction multiple data (SIMD) engine -- which Apple calls Velocity Engine, and Motorola calls AltiVec. This technology was co-invented by IBM, Motorola and Apple, and it made its first appearance on the G4.
MNW: How many engineers were involved in the project?
Stein: We do not disclose staffing details for individual projects.
MNW: What was the budget for the G5 project?
Stein: We do not disclose investment details for individual projects.
MNW: Clarify how this partnership with Motorola worked.
Stein: Motorola licensed the PowerPC architecture from IBM and during the years of the 'AIM' alliance, Apple, IBM and Motorola all collaborated on joint processor designs to be used by Apple in their personal computers -- including the 'G4' processor design and the AltiVec SIMD unit.
Although Motorola is still an IBM PowerPC licensee, and there is still collaboration on architecture improvements moving forward, the AIM alliance had differences on future processor developments and the companies develop their product offerings separately. The PowerPC 970 (G5) and its IBM follow-ons are solely IBM designs.
MNW: What influence has Apple have on the G5's development?
Stein: During the PowerPC 970's development Apple was identified as one of the primary customers. Their product and intellectual property requirements have had significant influence on the 970's development and have helped shape the final product.
MNW: Bill Van Etten, a principal at The BioTeam said recently that the G5 configuration -- in particular its AltiVec instructions -- made it far superior in performing intensive bioinformatics tasks than comparable offerings by Intel and AMD. Could you describe these capabilities in more detail? For what areas is AltiVec -- as well as other specialized instructions (and 64-bit computing) -- particularly optimized?
Stein: The PowerPC 970 includes two integer math units, as well as two floating-point math units, in addition to the AltiVec SIMD unit. This makes it ideal for heavy computational types of applications. The 64-bit architecture does let it work on larger chunks of data, but is a particular advantage in letting the processor address more physical memory then a 32-bit processor.
Additionally the fast processor bus allow data to be supplied more efficiently to the various processor units to make sure that they spend more time working on the data then waiting for the data to be supplied.
MNW: The PowerPC chip is being used in other products besides Apple's PCs -- game consoles is one example. In what areas are you planning to leverage the processor?
Stein: PowerPC processors are used in many segments of the embedded-processor market. They are used in everything from consumer electronic devices to some of the world's fastest supercomputers. In particular, the performance, power consumption and 64-bit capabilities of the PowerPC 970 family make it ideally suited for high-performance computing, server and high-performance embedded applications.
PowerPC has diverse applications and with the announcement of "Power Everywhere," we anticipate continued proliferation of the technology in the industry. Segments that are currently utilizing the Power Architecture include gaming, graphic design, super computing, wireless and aerospace.
MNW: What are some improvements you hope to see in the next iteration of the G5 chip?
Stein: IBM does not comment on unannounced products, but it is safe to say that we work to continually improve the power-performance of the 970 family.
MNW: When can we expect to see a G6 from IBM? What is the timeline for PowerPC processor advancement?
IBM does not comment on unannounced products.
MNW: Can you describe exactly what IBM's improved hyperthreading and multicore layout offers users?
Stein: The next generation server chip "POWER5" was recently announced. Like its predecessor, each POWER5 chip has two processor cores. POWER5 uses a technology called multithreading where multiple threads -- operations, applications, even operating systems -- can run independently on a single core.
The result is that even the single core looks like multiple processors to the operating systems and applications. At the Power Everywhere event in NYC on March 31st, IBM demonstrated a POWER5 based system running multiple independent operating system environments and applications.