HP Researchers Give Chips a Nano Spin

Hewlett-Packard researchers announced Tuesday that they have developed technology that could significantly boost the performance capabilities of an array of computer chips, while cutting back on power consumption at the same time.

If the research proves sound and makes it to market, its impact could be felt across a broad spectrum of technologies from the automotive and airline industries to consumer electronics to the military.

The revolutionary chip design, featured in the Jan. 24 issue ofNanotechnology, increases the transistor density of adaptable chips — known as “field programmable gate arrays” (FPGAs) — by a factor of eight. The trick, according to HP researchers Stan Williams and Greg Snider, is to eliminate the wiring running between the chip’s transistors and instead place a layer of switches connected with nanowires, measuring only a few atoms in thickness, above them.

“As conventional chip electronics continue to shrink, Moore’s law is on a collision course with the laws of physics,” said Williams, an HP senior fellow and director of Quantum Science Research at HP Labs. “What we’ve been able to do is combine conventional CMOS technology with nanoscale switching devices in a hybrid circuit to increase effective transistor density, reduce power dissipation, and dramatically improve tolerance of defective devices.”

Eureka Moment

The research could be the answer to a problem that has bedeviled the chip industry for more than a decade: how to continue to reduce the size of computer chips without increasing their cost. Throughout its history, the silicon chip manufacturing industry has relied on a reduction in the size of the transistor to make smaller, faster and, most importantly, cheaper chips.

Until now, progress has been in sync with Moore’s Law, a theory that predicts the number of transistors on a chip will double every two years. In recent years, however, chip manufacturers have found it increasingly difficult to shrink costs even as chip components have continued to decrease in size. To keep prices low, chip makers have been forced to sacrifice energy efficiency and performance in favor of reducing manufacturing costs in some cases.

Layering the wiring system will result in a smaller chip in which the transistors are more tightly packed without necessitating a reduction in size for the transistor, according to HP. That means manufacturers would not need to make any modifications to their current production facilities.

“The expense of fabricating chip is increasing dramatically with the demands of increasing manufacturing tolerances,” said Snider, who is a senior architect in quantum science research at HP Labs. “We believe this approach could increase the usable device density of FPGAs by a factor of eight using tolerances that are no greater than those required of today’s devices.”

Brave New World

Though the technology exists only as a simulation, the company expects to have a prototype by the end of the year. If all goes well, said Rob Enderle, principal analyst at the Enderle Group, this could “move the market up three generations in the time it typically would take to do one.”

HP’s discovery is very significant, he told TechNewsWorld. The microprocessor industry is having difficulty with power efficiency and is also running into a number of problems as they continue to shrink chips to ever smaller sizes.

“This technology could help the industry move much more quickly, and if [the HP chip] hits targets, could allow them to actually accelerate significantly the next generations of microprocessors,” he said.

Enderle predicts that the new design will have a bigger impact on processors in the near term, but will impact a number of closely related chip designs, including memory chips, in the long run.

Consumers and businesses can expect the new chips — which will mostly likely not make an appearance in electronics before 2011 — to power smaller, more power-efficient and higher-performance devices at a lower price.

“Think thinner iPods, more intelligent automobiles and homes, and increased power efficiency in appliances,” Enderle explained. “In addition, [the new chips] should also make things less expensive to build, which should translate into lower prices.”

As with any technology breakthrough, it is difficult to predict the full spectrum of changes the HP design will bring. However, according to Enderle, it is not hyperbole to say the sky may be the limit.

“This is one of those things where it is difficult to imagine the full impact before the event,” Enderle said. “It will touch so many technologies — from consumer to military, from automotive to airline, from entertainment to law enforcement — that the total change, if it makes it to market as expected, could dwarf our imaginations.”

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